摘要：It is well known that it is necessary to store the system input and output of previous trial for generating the input at the current trial in the design of iterative learning controllers. In order to apply the iterative learning controller for a real application and reduce the memory size for implementation, a current error based sampled-data iterative learning controller is presented in this paper for systems with initial resetting error, input disturbance and output measurement noise. The proposed iterative learning controller is simple and effective. One of the main contributions is to prove the convergence of learning error via a rigorous technical analysis. It is shown that the learning error will converge to a residual set if a forgetting factor is introduced. Another contribution is to realize the iterative learning controller by a digital circuit using an FPGA chip with the application to a repetitive position tracking control of DC motors. The feasibility and effectiveness of the proposed current error based sampled-data iterative learning controller are demonstrated by the experiment results. The relation between the learning performance and the design parameters are also discussed.

是否译文：否